The present invention relates to a semiconductor device and, more particularly, to a semiconductor integrated circuit device provided with a thin-film-transistor (called hereinafter a "TFT") forming on an insulating layer covering a silicon substrate.
TFT employs, as a substrate area in which a channel is to be formed, a silicon thin film formed on an insulating layer and includes source and drain regions and a gate electrode. The source and drain regions are selectively formed in the substrate area with an conductivity type opposite to that of the substrata area. The gate electrode is formed on a gate insulating film covering the substrate area between the source and drain regions.
Recently, as it has been proposed to employ TFT as load elements of a static random access memory (SRAM) cell, research and development have been being carried forward on an integrated circuit device including TFTs together with metal-insulator-semiconductor (MIS) transistors using a part of a silicon substrate as a substrate area. In order that such a device displays desirable performance, an improvement in TFT electrical characteristics is required. A large leakage current is one of the inferior characteristics of TFT to the MIS transistor. For reducing a leakage current, it is known in the art to form the substrate area very thin, less than 500 .ANG., for example.
However, forming the substrate area thin causes an increase in series resistance of the source and drain regions. Additional low resistivity conductive layers such as a metal are, therefore required to connect the source and drain regions to a signal source or a power supply source, resulting in increase in manufacturing steps. Moreover, such additional conductive layers restrict an increase in memory capacity of SRAM employing TFTs.